1. Field of the Invention
This invention relates to a via/contact opening for an integrated circuit structure filled with conductive metal and a process for making same. More particularly this invention relates to a via/contact opening for an integrated circuit structure filled with highly conductive metal, with thin barrier layers separating the highly conductive metal in the via/contact opening from underlying silicon, and a process for making the structure.
2. Description of the Related Art
In the construction of integrated circuit structures on semiconductor substrates such as a silicon substrate, vias or contact openings are formed through an insulation or dielectric layer, e.g., silicon oxide (SiO.sub.2), to electrically connect a metal pattern or wiring on the insulation layer either with a lower level of metal wiring or with elements of active devices, e.g., a source/drain region or a gate electrode of an MOS device, formed in the underlying silicon substrate.
Typically, such vias or contact openings are filled with aluminum metal. To avoid diffusion of the aluminum filler material into the underlying silicon substrate (and diffusion of the silicon into the aluminum) a titanium nitride barrier layer can be formed between the exposed portion of the substrate and the aluminum used to fill the opening. Sometimes this is accomplished by deposition of a titanium layer followed by an anneal in nitrogen to form the titanium nitride barrier layer as well as to form titanium silicide beneath the titanium nitride and in contact with the underlying silicon surface to thereby reduce the contact resistance.
However, as the diameters of the vias or contact openings become smaller, and aspect ratios increase (depth of opening divided by width), it has become more difficult to adequately fill the opening with sputtered aluminum. To solve this problem, it has been proposed to fill the opening with tungsten metal. However, since tungsten does not adhere well to the underlying silicon either an intermediate layer of titanium nitride or a dual layer of titanium silicide/titanium nitride is usually formed over the silicon and beneath the tungsten filler or plug in the opening. The use of titanium silicide can also reduce the contact resistance, for example, from over 100 .OMEGA. to as little as 1 .OMEGA. for a 0.5 .mu.m diameter contact opening. Such tungsten-filled via/contact openings are shown, for example, in Pintchovski et al. U.S. Pat. No. 4,822,753; Sun et al. U.S. Pat. No. 4,994,410; Lifshitz et al. U.S. Pat. No. 5,149,672; Somekh et al. U.S. Pat. No. 5,250,467; Somekh et al. U.S. Pat. No. 5,356,835; Yu et al. U.S. Pat. No. 5,380,678; Kim U.S. Pat. No. 5,397,742; Marangon et al. U.S. Pat. No. 5,407,861; Fujita U.S. Pat. No. 5,413,669; and Chen U.S. Pat. No. 5,462,895.
The underlying titanium nitride layer used in such tungsten-filled via/contact openings is usually either deposited onto the surface of the via/contact opening (as well as the exposed surface of the silicon substrate at the bottom of the contact opening), or a layer of titanium metal is deposited followed by annealing in nitrogen gas, causing the titanium layer to react with the nitrogen to form titanium nitride (as well as titanium silicide wherever the titanium metal layer is in contact with silicon). The aforementioned Pintchovski et al. U.S. Pat. No. 4,822,753, for example, describes the deposition of titanium nitride over an insulating layer, as well as the sidewall and bottom surfaces of an opening in the insulating layer, by CVD prior to filling the opening with a tungsten plug. The above-mentioned Lifshitz et al. U.S. Pat. No. 5,149,672, for example, teaches the sputter deposition of tungsten nitride over a silicon oxide layer followed by deposition of a tungsten layer by CVD (using WF.sub.6 and H) over the titanium nitride layer, with aluminum then optionally sputtered over the wafer.
When titanium metal is deposited and then converted to titanium silicide/nitride, care must be taken to not expose the titanium metal surface to oxygen prior to the annealing step. To avoid this, the aforementioned Sun et al. U.S. Pat. No. 4,994,410 sputters a thin layer of tungsten over the titanium and then anneals in nitrogen to form the underlying titanium silicide/titanium nitride layers, with the nitrogen gas penetrating the tungsten layer to reach the underlying titanium layer. Sun et al. then fill the remainder of the via with CVD tungsten (which cannot be deposited directly over the titanium metal without undesirable side reactions between the titanium metal and the fluorine in the WF.sub.6 used to form the CVD tungsten layer). However, the sputtering of tungsten over a titanium metal layer cannot be used satisfactorily with small openings (e.g., diameters less than about 0.5 .mu.m or aspect ratios larger than 2.5).
While the use of tungsten as a filler material for vias and contact openings has been, in the main, satisfactory, there has now arisen a need for faster devices and the higher resistance of tungsten (CVD tungsten resistance is about 11 .mu..OMEGA.cm) compared to other metals has resulted in consideration of copper (resistivity about 2 .mu..OMEGA.cm) as a metal filler material for vias and contact openings. For example, Gelatos et al. U.S. Pat. No. 5,391,517 shows a via filled with copper. However, as is well known to those skilled in the art, copper is a fast diffuser in silicon and silicon oxide, much faster than aluminum. Furthermore, the copper diffusion is not only vertical, e.g., potentially into the underlying silicon substrate, but also horizontal as well, e.g., into the dielectric material forming the sidewall of the via or contact opening. To obtain proper adherence of the copper to the device substrate and to avoid such undesirable diffusion of the copper, Gelatos et al. provide a composite interface layer comprising a first titanium layer, which is sputtered onto the dielectric to a thickness of about 100-300 Angstroms, followed by a sputter deposition of titanium nitride to a thickness of about 300-500 Angstroms. Another titanium layer is then sputtered over the titanium nitride layer to a thickness of about 100-300 Angstroms. Copper is then deposited over the second layer of titanium to completely fill the opening, and the structure is then annealed to cause the copper to form a titanium copper alloy with the underlying second layer of titanium.
While such a structure apparently adequately protects the Gelatos et al. substrate and opening sidewalls from diffusion of the copper filler, the formation of 300-500 Angstroms of titanium nitride in contact openings as small as 0.5 .mu.m in diameter would be difficult to accomplish by sputtering, and CVD titanium nitride has a high resistance of .about.400 .mu..OMEGA.cm, compared to .about.2 .mu..OMEGA.cm for CVD copper (CVD copper is 200 times more conductive than CVD titanium nitride), and therefore the use of CVD titanium nitride would be counterproductive to the use of a high conductivity copper filler material.
However, the need for faster devices, coupled with the need to avoid diffusion of via/contact opening filler materials into either the underlying substrate or the sidewalls of the opening, as well as the shrinkage in the diameter of the via/contact openings and an increase in the aspect ratios of such openings, has created difficulties. It would, therefore, be desirable to provide an integrated circuit structure with via/contact openings having a low resistance filler in the via/contact opening and adequately protected against diffusion of the filler material into either the underlying substrate or the sidewalls of the dielectric in which the opening is formed, even with via/contact opening diameters as small as 0.5 .mu.m and aspect ratios as high as 2.5.